1. Field of the Invention
The field of the invention is signal processing, or, more specifically, source series terminated (“SST”) driver circuits and methods for operating such SST driver circuits.
2. Description of Related Art
Today's computing systems are increasingly more complex. One technology increasing in complexity is data communications bus technology. Data rates, data sizes, and the like are growing. Requirements for drivers that transmit data signals at such data rates and sizes are also becoming more stringent. For example, the Peripheral Component Interconnect (PCI) and PCI express (PCIe) standards include various driver requirements. The PCIe driver is required to have a differential output resistance at 50 ohms with a 20% tolerance. The PCIe Generation 1 and PCIe Generation 2 standards require fixed equalization amounts for 2.5 Gigabits per second (Gbps) and 5 Gbps data rates, respectively. The PCIe Generation 3 standard allows, for a data rate of 8 Gbps, a variable equalization defined in fixed step sizes. Each of the PCIe equalization requirements specify a tolerance of 1-1.5 decibels (db). Further, PCIe standards provide for reduced amplitude modes of operation, and the equalization and output resistance values must be maintained when operating in these modes.
Some driver circuits today attempt to provide for one of these requirements. For example, some driver circuits enable the output resistance to be programmable. These circuits, however, rely on parallel Field Effect Transistor (‘FET’) arrays in the driver's output stage. The FETs are typically large in order to achieve a small granularity in resistance step size. Using such large FETs, however, greatly increases the output capacitance of the driver circuit.
Many of today's driver circuits do not address equalization reduction due to package loss. Instead, such circuits require a user to adjust equalization coefficients for a particular package loss. This approach, however, is not sufficient for all applications as data rates may change on the fly during data rate negotiation. Adjusting equalization settings for package loss on the fly is difficult for a user.
What is needed, therefore, is a driver circuit that provides variable output resistance, with minimal increase in output capacitance, a driver circuit that provides variable output resistance along with variable equalization settings, a driver circuit that provides variable output resistance along with variable equalization settings and amplitude reduction, and a driver circuit that provides variable output resistance along with variable equalization settings, amplitude reduction, and equalization adjustment due to package loss—all while maintaining the output resistance within a predefined tolerance.